Origin of Critical Substrate Bias in Variable Threshold Voltage CMOS

Takashi Inukai; Hyunsik Im; Toshiro Hiramoto

doi:https://doi.org/10.7567/SSDM.2001.D-2-5

2001 International Conference on Solid State Devices and Materials

Sep 26, 2001 - Sep 28, 2001
Diamond Hotel, Tokyo, Japan

[D-2-5] Origin of Critical Substrate Bias in Variable Threshold Voltage CMOS

Takashi Inukai, Hyunsik Im, Toshiro Hiramoto (1.Institute of Industrial Science, University of Tokyo, 2.VLSI Design and Education Center, University of Tokyo)

https://doi.org/10.7567/SSDM.2001.D-2-5

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