[D-8-2] W/HfO2 gate stacks with Tinv~1.2nm and low charge trapping
A. Callegari, P. Jamison, B.H. Lee, D. Neumayer, V. Narayanan, S. Zafar, E. Gousev, C. D'Emic, D. Lacey, M. Gribelyuk, C. Cabral, A. Steegen, V. Ku, R. Amos, Y. Li, P. Nguyen, F. Mc. Feely, G. Singco, J. Cai, S-H Ku, Y.Y. Wang, C. Wajda, D. O'Meara, H. Shinriki, T. Takahashi
(1.IBM Semiconductor Research and Development Center (SRDC), 2.IBM T. J. Watson Research Center, 3.Tokyo Electron America (TEL))
https://doi.org/10.7567/SSDM.2003.D-8-2