[B-9-3] A 500ｰC fabrication process for MIM capacitors-based on a Ta2O5/Nb2O5 bilayer with high permittivity-for DRAM and SoC applications

Yuichi Matsui, Masahiko Hiratani, Isamu Asano (1.Central Research Laboratory, Hitachi, Ltd., 2.Elpida Memory, Inc.)

https://doi.org/10.7567/SSDM.2004.B-9-3