[H-9-3] Self-aligned MTJ etching technique using side walls for high-density 8F2 MRAMs

M. Yoshikawa, M. Amano, T. Ueda, E. Kiatagawa, S. Takahashi, T. Kai, T. Kishi, N. Shimomura, H. Aikawa, T. Kajiyama, K. Hosotani, Y. Asao, K. Suemitsu, H. Hada, S. Tahara, H. Yoda (1.Corporate Research & Development Center, Toshiba Corporation, 2.SoC Research & Development Center, Toshiba Corporation, 3.System Devices Research Laboratories, NEC Corporation)

https://doi.org/10.7567/SSDM.2005.H-9-3