[P-2-6] Evolution of Wafer Shape and Localized Stress of Silicon Surrounded by Through Silicon Via Patterns along Various Process Integration Steps

C. H. Lee¹、S. H. Jie¹、S. H. Son¹、J. T. Kim¹、H. W. Yoo¹、I. K. Han¹、W. S. Yoo² (1.Hynix Semiconductor Inc. , Korea、2.WaferMasters, Inc. , USA)

https://doi.org/10.7567/SSDM.2011.P-2-6