[E-5-4] Impacts of Surface Roughness Reduction in (110) Si Substrates by High Temperature Annealing on Electron Mobility in n-MOSFETs on (110) Si

S. H. Jeon¹、N. Taoka^1,2、H. Matsumoto³、K. Nakano³、S. Koyama³、H. Kakibayasi³、K. Araki⁴、M. Miyashita⁴、K. Izunome⁴、M. Takenaka¹、S. Takagi¹ (1.Univ. of Tokyo、2.Nagoya Univ.、3.Hitachi High-technologies Corp.、4.Covalent Silicon Corp. , Japan)

https://doi.org/10.7567/SSDM.2012.E-5-4