The Japan Society of Applied Physics

[J-2-2] A CMOS-MEMS Design Technique based on an Electrical Circuit Simulator with Hardware Description Language

T. Konishi1、S. Maruyama2、M. Mita3、D. Yamane4、H. Ito4、K. Machida1,4、N. Ishihara4、K. Masu4、H. Fujita2、H. Toshiyoshi2 (1.NTT Advanced Tech. Corp.、2.Univ. of Tokyo、3.JAXA、4.Tokyo Tech , Japan)

https://doi.org/10.7567/SSDM.2012.J-2-2