[J-2-2] A CMOS-MEMS Design Technique based on an Electrical Circuit Simulator with Hardware Description Language

T. Konishi¹、S. Maruyama²、M. Mita³、D. Yamane⁴、H. Ito⁴、K. Machida^1,4、N. Ishihara⁴、K. Masu⁴、H. Fujita²、H. Toshiyoshi² (1.NTT Advanced Tech. Corp.、2.Univ. of Tokyo、3.JAXA、4.Tokyo Tech , Japan)

https://doi.org/10.7567/SSDM.2012.J-2-2