A 36-channel Neural Recoding Chip for Brain Machine Interface

T. Yoshida; H. Ando; M. Ono; Y. Murasaka; A. Iwata; T. Suzuki; K. Matsushita; M. Hirata

doi:https://doi.org/10.7567/SSDM.2012.J-2-4

2012 International Conference on Solid State Devices and Materials

2012年9月25日〜 2012年9月27日
Kyoto International Conference Center, Kyoto, Japan

[J-2-4] A 36-channel Neural Recoding Chip for Brain Machine Interface

T. Yoshida¹、H. Ando²、M. Ono³、Y. Murasaka³、A. Iwata³、T. Suzuki²、K. Matsushita⁴、M. Hirata⁴ (1.Hiroshima Univ.、2.National Inst. of Info. and Communications Tech.、3.A-R-Tec Corp.、4.Osaka Univ. , Japan)

https://doi.org/10.7567/SSDM.2012.J-2-4

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