The Japan Society of Applied Physics

[D-1-2] Physical Limitation of pn Junction in Two Dimensional Si Layers for Future CMOS

T. Mizuno1、Y. Nakahara1、Y. Nagata1、Y. Suzuki1、Y. Kubodera1、Y. Shimizu1、T. Aoki1、T. Sameshima2 (1.Kanagawa Univ.、2.Tokyo Univ. of Agriculture/Tech. (Japan))

https://doi.org/10.7567/SSDM.2013.D-1-2