[M-6-4] Zero Area Overhead State Retention Flip Flop Utilizing Crystalline In-Ga-Zn Oxide Thin Film Transistor with Simple Power Control Implemented in a 32-bit CPU

N. Sjokvist^1,2, T. Ohmaru¹, K. Furutani¹, A. Isobe¹, N. Tsutsui¹, H. Tamura¹, W. Uesugi¹, T. Ishizu¹, T. Onuki¹, K. Ohshima¹, T. Matsuzaki¹, H. Mimura¹, A. Hirose¹, Y. Suzuki¹, Y. Ieda¹, T. Atsumi¹, Y. Shionoiri¹, K. Kato¹, G. Goto¹, J. Koyama¹, M. Fujita³, S. Yamazaki¹ (1.Semiconductor Energy Laboratory Co., Ltd., 2.Linkoping Univ., 3.Univ. of Tokyo (Japan))

https://doi.org/10.7567/SSDM.2013.M-6-4