[PS-5-3] A Stabilization Technique for Intermediate Power Level in Stacked-Vdd ICs using Parallel I/O Signal Coding

T. Nishiyama¹、T. Koizuka¹、H. Okamura¹、T. Yamanokuchi¹、K. Nakamura¹ (1.Kyushu Inst. of Tech. (Japan))

https://doi.org/10.7567/SSDM.2013.PS-5-3