The Japan Society of Applied Physics

[A-3-4] 2T1C Gain Cell Memory with Improved Retention Characteristic By Dual Coupling Method for SOC application Using 45nm-logic compatible CMOS Process

C.J. Lee1, Y.K. Lee1, M.K. Park1, S.W. Kim1, D.H. Lee1 (1.Samsung Electronics Corp. (Korea))

https://doi.org/10.7567/SSDM.2014.A-3-4