Back Gate Bias-Temperature Instability in Single-Layer Double-Gated Graphene Field-Effect Transistors

Y. Y. Illarionov

doi:https://doi.org/10.7567/SSDM.2015.B-5-4

18:25 〜 18:40

[B-5-4] Back Gate Bias-Temperature Instability in Single-Layer Double-Gated Graphene Field-Effect Transistors

^○Y. Y. Illarionov^1,2, M. Waltl¹, A. D. Smith³, S. Vaziri³, M. Ostling³, M. Lemme⁴, T. Grasser¹ (1.Inst. for Microelectronics (TU Wien), 2.Ioffe Physical-Technical Inst., 3.KTH Royal Inst. of Technology, 4.Univ. of Siegen(Austria))

https://doi.org/10.7567/SSDM.2015.B-5-4

2015 International Conference on Solid State Devices and Materials

[B-5-4] Back Gate Bias-Temperature Instability in Single-Layer Double-Gated Graphene Field-Effect Transistors