11:15 〜 11:35

[B-6-01] 47% Data-Retention Error Reduction of TLC NAND Flash Memory by Introducing Stress Relaxation Period with Round-Robin Wear-leveling

^○Y. Deguchi¹, A. Kobayashi¹, K. Takeuchi¹ (1.Chuo Univ.(Japan))

https://doi.org/10.7567/SSDM.2016.B-6-01