Area-Efficient NanoBridge-based FPGA with Optimized Architecture

X. Bai

doi:https://doi.org/10.7567/SSDM.2016.J-5-01

2016 International Conference on Solid State Devices and Materials

2016年9月26日〜 2016年9月29日
Tsukuba International Congress Center, Tsukuba, Japan

09:30 〜 09:50

[J-5-01] Area-Efficient NanoBridge-based FPGA with Optimized Architecture

^○X. Bai¹, T. Sakamoto¹, Y. Tsuji¹, M. Miyamura¹, A. Morioka¹, R. Nebashi¹, M. Tada¹, N. Banno¹, K. Okamoto¹, N. Iguchi¹, H. Hada¹, T. Sugibayashi¹ (1.NEC Corp.(Japan))

https://doi.org/10.7567/SSDM.2016.J-5-01

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