The Japan Society of Applied Physics

9:30 AM - 9:50 AM

[J-5-01] Area-Efficient NanoBridge-based FPGA with Optimized Architecture

X. Bai1, T. Sakamoto1, Y. Tsuji1, M. Miyamura1, A. Morioka1, R. Nebashi1, M. Tada1, N. Banno1, K. Okamoto1, N. Iguchi1, H. Hada1, T. Sugibayashi1 (1.NEC Corp.(Japan))

https://doi.org/10.7567/SSDM.2016.J-5-01