3:00 PM - 5:00 PM

[PS-5-05] A Gain Cell Array with Retention Increment Design for Bit-Area Efficient On-Chip Memory Applications

^○S. Manisankar¹, H. Kim¹, Y. Chung¹ (1.Kyungpook National Univ.(Korea))

https://doi.org/10.7567/SSDM.2016.PS-2-5-17