An All-Digital Duty-Cycle Corrector with Synchronous and High Accuracy Output for DDR-SDRAM Application

Y. L. Lo

doi:https://doi.org/10.7567/SSDM.2016.PS-2-5-18

3:00 PM - 5:00 PM

[PS-5-06] An All-Digital Duty-Cycle Corrector with Synchronous and High Accuracy Output for DDR-SDRAM Application

Y. L. Lo¹,^○C. W. Tsai², C. C. Chang¹, H. Y. Liu¹, W. B. Yang³, K. H. Cheng² (1.National Kaohsiung Normal Univ.(Taiwan), 2.National Central Univ.(Taiwan), 3.Tamkang Univ.(Taiwan))

https://doi.org/10.7567/SSDM.2016.PS-2-5-18

2016 International Conference on Solid State Devices and Materials

[PS-5-06] An All-Digital Duty-Cycle Corrector with Synchronous and High Accuracy Output for DDR-SDRAM Application