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[E-4-01] Design of Steep Slope Negative Capacitance FinFETs for Dense Integration: Matching of Channel and Ferroelectric Capacitances

^○H. Ota¹, J. Hattori¹, H. Asai¹, T. Ikegami¹, K. Fukuda¹, S. Migita¹, A. Toriumi² (1.AIST (Japan), 2.Univ. of Tokyo (Japan))

https://doi.org/10.7567/SSDM.2017.E-4-01