A 28nm High- <i>k</i>/Metal-gate Symmetric 10T 2RW Dual-port SRAM bitcell design

T. Y. Lu

doi:https://doi.org/10.7567/SSDM.2017.G-6-02

11:45 〜 12:05

[G-6-02] A 28nm High- k/Metal-gate Symmetric 10T 2RW Dual-port SRAM bitcell design

T. Y. Lu¹, C. H. Huang¹, S. S. Chen¹, Y. T. Kuo¹, C. C. Lung¹, O. Cheng¹, Y. Ishii², M. Tanaka², M. Yabuuchi², Y. Sawada², S. Tanaka²,^○K. Nii² (1.United Microelectronics Corp. (Taiwan), 2.Renesas Electronics Corp. (Japan))

https://doi.org/10.7567/SSDM.2017.G-6-02

2017 International Conference on Solid State Devices and Materials

[G-6-02] A 28nm High- k/Metal-gate Symmetric 10T 2RW Dual-port SRAM bitcell design