Thermally grown SiO2 film has played a central role in the gate insulating technology. The kinetics of the thermal oxidation of silicon surfaces has long been discussed based on the Deal-Grove model, but it cannot be applied to thin oxide films less than ~30 nm formed in a dry oxygen ambient. The so-called “layer-by-layer growth mode” also cannot be explained by the Deal-Grove model. This lecture ruminates on the initial oxidation mechanism of Si surfaces, shedding light on the presence of the strained oxide layer in the vicinity of the SiO2/Si interface. The latest understanding will play an essential role in the on-going evolution from planar devices to three-dimensional multi-gate devices.
Implementation of high-k/metal gate stack poses a new challenge in controlling the threshold voltage of CMOS devices. The threshold voltage is known to be shifted by an electric dipole layer formed at the interface between high-k oxide and underling interfacial SiO2 layer. This lecture will address the origin of the dipole layer focusing on a recent molecular dynamics studies, in which dipoles at various high-k/SiO2 interfaces are successfully reproduced in the course of redistribution of ion species around the interface.