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[PS-1-17] Steep Switching Less Than 15 mV/decade in Silicon-on-Insulator Tunnel FETs by Trimmed-Gate Structure

^○H. Asai¹, T. Mori¹, T. Matsukawa¹, J. Hattori¹, K. Endo¹, K. Fukuda¹ (1.AIST (Japan))

https://doi.org/10.7567/SSDM.2018.PS-1-17