The Japan Society of Applied Physics

11:00 AM - 1:30 PM

[PS-4-10] Fabrication of In0.53Ga0.47As homo-junction TFET with optimized gate stack by employing surface treatment and post metallization annealing

M.W. Kong1,2, S.K. Eom1,2, C.H. Lee1,2, H.Y. Cha3, K.S. Seo1 (1.Seoul National Univ. (Korea), 2.Inter-Univ. Semiconductor Res. Center (Korea), 3.Hongik Univ. (Korea))

https://doi.org/10.7567/SSDM.2018.PS-4-10