11:00 AM - 1:30 PM

[PS-SP-03] Ring VCO based ultra low jitter PLL architecture.

T. Khan², M. Dietl¹,^○P. Sareen¹, S. Tambouris¹ (1.Texas Instruments (Germany), 2.University of Paderborn (Germany))

https://doi.org/10.7567/SSDM.2018.PS-SP-03