The Japan Society of Applied Physics

9:50 AM - 10:40 AM

[SC-SP-02] Logic Device Scaling

S. Maeda (Samsung Electronics (Korea))

Si technology has been evolved so far by scaling. The scaling law provides power, performance, and area improvement at the same time, and cost is also reduced as a result of area reduction. Although long time has already passed since limit of scaling started to be mentioned, cutting edge logic process development such as 7nm, 6nm, 5nm, 4nm, 3nm, is still continuing under huge competition in reality. In this short course, presenter will overview past decades of Si technology evolution history, and introduce recent cutting edge Si technology which indicates that Si technology will continue to be a mainstream for a while, and regain cost effectiveness by EUV lithography. He will also give Insight on future evolution of Si technology.