12:15 〜 12:30

[C-4-05] Effect of Dielectric Layer Scheme for High-Quality Silicon Channel in Monolithic 3DIC

〇Yu Wei Liu¹, Yi Jui Chang¹, Chih Chao Yang², Chang Hong Shen², Kuan Neng Chen¹, Chenming Hu³ (1. National Chiao Tung Univ.(Taiwan), 2. Taiwan Semiconductor Res. Inst.(Taiwan), 3. Univ. of California, Berkeley(United States of America))

https://doi.org/10.7567/SSDM.2020.C-4-05