Computing-in-Memory Demonstration of Multiple-State (&gt;8) Analog Memory Cell with Ultra-Low (&lt;1 nA/cell) Current Enabled by Monolithic  CAAC-IGZO FET + Si CMOS FET Stack     for Highly-Efficient AI Applications

Satoru Ohshita

doi:https://doi.org/10.7567/SSDM.2021.A-8-01

10:45 〜 10:52

[A-8-01] Computing-in-Memory Demonstration of Multiple-State (>8) Analog Memory Cell with Ultra-Low (<1 nA/cell) Current Enabled by Monolithic CAAC-IGZO FET + Si CMOS FET Stack for Highly-Efficient AI Applications

〇Satoru Ohshita¹、Hidefumi Rikimaru¹、Kazuki Tsuda¹、Hiromichi Godo¹、Yoshiyuki Kurokawa¹、Yoshinori Ando¹、Hiromi Sawai¹、Yasumasa Yamane¹、Shunpei Yamazaki¹、Toru Nakura²、Hiroshi Yoshida³、Kuo-Chang Huang³、Miller Liao⁴、Shou-Zen Chang³ (1.Semiconductor Energy Laboratory Co., Ltd.、2.Fukuoka Univ.、3.Powerchip Semiconductor Manufacturing Corp.、4.National Taiwan Univ.)

https://doi.org/10.7567/SSDM.2021.A-8-01

2021 International Conference on Solid State Devices and Materials

[A-8-01] Computing-in-Memory Demonstration of Multiple-State (>8) Analog Memory Cell with Ultra-Low (<1 nA/cell) Current Enabled by Monolithic CAAC-IGZO FET + Si CMOS FET Stack for Highly-Efficient AI Applications