16:15 〜 16:22

[B-2-02] Operation Optimization of Logic Compatible 2T RRAM Array by High-κ Metal Gate CMOS Logic Technologies

〇Yao-Hung Huang¹、Chrong-Jung Lin¹、Ya-Chin King¹ (1.National Tsing Hua Univ.)

https://doi.org/10.7567/SSDM.2021.B-2-02