The Japan Society of Applied Physics

11:29 AM - 11:36 AM

[C-4-04] Via-last Cu-TSV fabrication on LSI wafer using WNi as barrier/seed layer for 3D integration _ a feasibility study on WNi-CMP

〇Murugesan Mariappan1, JC Bea1, M Koyanagi1, T Fukushima1 (1.GINTI, Tohoku University)

https://doi.org/10.7567/SSDM.2021.C-4-04