Room-temperature fabrication of ionic liquid gated Zn<sub>3</sub>N<sub>2</sub> electric double layer transistors with non-degenerate channel electron density

Kaiwen Li, Kota Hanzawa, Keisuke Ide, Kosuke Matsuzaki, Takayoshi Katase, Hidenori Hiramatsu, Hideo Hosono, Qun Zhang, Toshio Kamiya

doi:https://doi.org/10.7567/SSDM.2021.J-5-07

3:05 PM - 3:12 PM

[J-5-07] Room-temperature fabrication of ionic liquid gated Zn₃N₂ electric double layer transistors with non-degenerate channel electron density

〇Kaiwen Li^1,2, Kota Hanzawa¹, Keisuke Ide¹, Kosuke Matsuzaki¹, Takayoshi Katase¹, Hidenori Hiramatsu¹, Hideo Hosono¹, Qun Zhang², Toshio Kamiya¹ (1.Tokyo Inst. of Tech., 2.Fudan Univ.)

https://doi.org/10.7567/SSDM.2021.J-5-07

2021 International Conference on Solid State Devices and Materials

[J-5-07] Room-temperature fabrication of ionic liquid gated Zn3N2 electric double layer transistors with non-degenerate channel electron density

[J-5-07] Room-temperature fabrication of ionic liquid gated Zn₃N₂ electric double layer transistors with non-degenerate channel electron density