14:28 〜 14:35

[L-1-05] A Bit-Line Disturb Free Loadless 4T SRAM Using Gate Leakage Current for Sustaining Data with High Immunity against Process Variations

〇Yihan Zhu¹、Takashi Ohsawa¹ (1.Waseda Univ.)

https://doi.org/10.7567/SSDM.2021.L-1-05