The Japan Society of Applied Physics

3:15 PM - 3:30 PM

[D-6-07] Low-voltage operation of pentacene-based floating-gate memory utilizing N-doped LaB6 metal and high-k LaBxNy insulator stacked structure

〇Eun-Ki Hong1, Shun-ichiro Ohmi1 (1. Tokyo Inst. of Tech. (Japan))

Presentation style: Online

https://doi.org/10.7567/SSDM.2022.D-6-07

In this paper, we have investigate low-voltage opera-tion of pentacene-based floating-gate memory utilizing nitrogen-doped (N-doped) LaB6 metal and LaBxNy insu-lator stacked structure. The Ar/N2-plasma nitridation was found to be effective to suppress the leakage current between the Au source/drain and N-doped LaB6 float-ing-gate. The pentacene-based floating-gate memory was successfully developed with memory window (MW) of 0.4 V under program/erase (P/E) voltage and time of ±3 V/100 µs, and the process temperature of 200 °C maximum.