Implantation-Free Vertically Stacked GAA Poly-Si Nanosheet FETs <br />with Raised Source/Drain

Po-Yi Kuo

doi:https://doi.org/10.7567/SSDM.2022.E-2-04

3:00 PM - 3:15 PM

[E-2-04] Implantation-Free Vertically Stacked GAA Poly-Si Nanosheet FETs
with Raised Source/Drain

〇Po-Yi Kuo¹, Po-Yang Huang¹, Yu-Cheng Chou¹, Cing-Long Huang¹, Yu-Ming Chiu¹ (1. Department of Electronic Engineering, Feng Chia University (Taiwan))

Presentation style: Online

https://doi.org/10.7567/SSDM.2022.E-2-04

The implantation-free vertically stacked gate-all-around (GAA) poly-Si nanosheet (NS) FETs (VS GAA Poly-Si NSTs) with raised S/D have been successfully fabricated and demonstrated. The proposed VS GAA Poly-Si NSTs with 2 NS channels exhibit improved electrical characteristics and low gate operation voltages compared with conventional SPC planar poly-Si TFTs.

2022 International Conference on Solid State Devices and Materials

[E-2-04] Implantation-Free Vertically Stacked GAA Poly-Si Nanosheet FETs with Raised Source/Drain

[E-2-04] Implantation-Free Vertically Stacked GAA Poly-Si Nanosheet FETs
with Raised Source/Drain