The Japan Society of Applied Physics

11:15 〜 11:30

[A-6-02] First Demonstration of Bi-directional Sub-50 mV/dec MoS 2-Hf 0.5Zr 0.5O 2 Ferroelectric FET with Record High Memory Window Efficiency Exceeding the Theoretical Limit and High-Precision Analog Synapse

HENG XIANG1, Yu-Chieh Chien1, Lingqi Li1, Haofei Zheng1, Sifan Li1, Yufei Shi1, Kah-Wee Ang1,2 (1. National Univ. of Singapore (Singapore), 2. Inst. of Materials Res. and Eng. (Singapore))

https://doi.org/10.7567/SSDM.2023.A-6-02

We report a ferroelectric field-effect transistor (FeFET) featuring two-dimensional (2D) semiconductor MoS2, bi-directional sub-50 mV/dec subthreshold swing (SS), and ultra-large memory window (MW) of up to 11.5 V for high-accuracy (94.5%) 7-bit-state analog synapse. Our MoS2-FeFET shows a small cycle-to-cycle (C2C) variation of MW, a high on-off ratio (~107), extrapolated 10-year retention, and a record MW efficiency (ηv) of 200 %. The breakthrough of the coercive voltage limitation (2VC) is attributed to the following factors: (i) by tuning the ratio of the dielectric area (AOX) and the ferroelectric area (AFE), we diminish the charge mismatch between dielectric and ferroelectric layers and the depolarization field in the gate stack; (ii) by adapting 2D MoS2 as the channel material with dangling bond free surface, we achieve minimum trap density states at the interface; (iii) the hybrid contribution of the ferroelectric switching and the electron trapping/de-trapping in the ferroelectric layer.