Compact Thermally Stable High Voltage FinFET with 40nm Tox and Lateral Break-Down>35V for 3D NAND Flash Periphery Application

Alessio Spessot

doi:https://doi.org/10.7567/SSDM.2023.E-4-02

11:15 AM - 11:30 AM

[E-4-02] Compact Thermally Stable High Voltage FinFET with 40nm Tox and Lateral Break-Down>35V for 3D NAND Flash Periphery Application

^○Alessio Spessot¹, Philippe Matagne¹, Hiroaki Arimura¹, Jishnu Ganguly¹, Romain Ritzenthaler¹, Joao Bastos¹, Ritam Sarkar¹, Elena Capogreco¹, Yangyin Chen^1,2, Naoto Horiguchi¹ (1. imec (Belgium), 2. Western Digital (Belgium))

https://doi.org/10.7567/SSDM.2023.E-4-02

We propose for the first time a dedicated FinFET (FF) technology with specific optimization for tox>40nm and lateral break-down (LBD)>35V to replace the conventional planar high voltage (HV) transistors in the 3D NAND Flash periphery. We show significant current increase (>x2) and area saving per footprint, solving one of the key bottlenecks of future 3D NAND nodes. Fabrication of thermally stable prototypes is shown, with no significant impact on the overall fabrication complexity

2023 International Conference on Solid State Devices and Materials

[E-4-02] Compact Thermally Stable High Voltage FinFET with 40nm Tox and Lateral Break-Down>35V for 3D NAND Flash Periphery Application