The Japan Society of Applied Physics

9:15 AM - 9:30 AM

[E-5-02] Improved C-axis-aligned Crystalline Oxide Semiconductor FET Suitable for Scaling and Monolithic Stacking for Higher Integration of Integrated Circuit

Hiromi Sawai1, Motomu Kurata1, Tsutomu Murakawa1, Yoshinori Ando1, Takako Kikuchi1, Kunihiro Fukushima1, Ryota Eto1, Shinya Sasagawa1, Kentaro Sugaya1, Ryota Hodo1, Yuki Okamoto1, Toshiki Mizuguchi1, Hitoshi Kunitake1, Shunpei Yamazaki1 (1. Semiconductor Energy Laboratory Co., Ltd. (Japan))

https://doi.org/10.7567/SSDM.2023.E-5-02

C-axis-alinged crystalline oxide semiconductor (CAAC-OS) FETs exhibit ultralow off leakage current and thus are suitable for low-power devices. Furthermore, process and thus are promising as memory devices. For higher integration using the CAAC-OS FETs, we examined scaling and monolithic stacking. These techniques will contribute to higher speed and integration of memory devices.