Beyond 3nm node, the transition of transistor architecture of stacked channel gate-all-around (GAA) FETs can replace FinFETs for advanced technology due to the improvement of power, performance, and area by the enhanced short channel control, cell design flexibility, and drive current per footprint. High ION and reduced parasitic RC are the keys to extending nanosheet technologies for N+1 and N+2 nodes. To extend nanosheets to the next nodes, we have demonstrated additional enabling knobs such as high mobility channels, high-k gate dielectrics, and highly stacked channels to effectively increase the ION for high performance. Beyond stacked nanosheets, new transistor architectures such as TreeFET (a combination of FinFET and stacked nanosheets) and CFET (3D stacked n and p FETs) can further enable cell height scaling for parasitic RC re-duction. CFETs and atomic channels have the potentials to be used in A5 and A2 nodes according to the transistor roadmap by IMEC, respectively. Note that ultrathin bodies as thin as 1 nm can be considered as atomic channels for nearly ideal SS and high ION/IOFF for low power applications.