A novel STT-MRAM-based Independent Recurrent Neural Network (IndRNN) accelerator architecture is proposed for complex computation like action recognition with high energy efficiency. The weight parameters are fully stored on-chip after using a new quantization method introduced by Approximate Dictionary Encoding. This substantially diminishes the required memory size by 87.3% while preserving recognition capability. Compared to the conventional Long Short-Term Memory benchmark, the 55nm-MTJ/CMOS prototype achieves a 20.9% improvement in the Human Action Recognition benchmark and reduces power consumption by 65.4% compared to SRAM-based accelerators. In terms of energy efficiency, it achieves 3.376 TOPS/W which outperforms all previous RNN accelerator research.