3D Vertical Poly-Si FeFETs Toward Stackable High-Density Non-volatile Memory Applications

Zhao- Feng Lou

doi:https://doi.org/10.7567/SSDM.2023.K-1-04

3:00 PM - 3:15 PM

[K-1-04] 3D Vertical Poly-Si FeFETs Toward Stackable High-Density Non-volatile Memory Applications

^○Zhao- Feng Lou¹, Zhi-Xian Li², Fu-Sheng Chang³, Chen-Ying Lin², Jia-Hong Chen², Zong-Han Li², Cheng-Hong Liu¹, Tim Chen⁴, Min-Hung Lee¹ (1. Graduate School of Advance Tech., National Taiwan Univ. (Taiwan), 2. Inst. and Undergraduate Program of Electro-Optical Eng., National Taiwan Normal Univ. (Taiwan), 3. Graduate Inst. of Electronics Eng., National Taiwan Univ. (Taiwan), 4. AUCMOS Tech. (United States of America))

https://doi.org/10.7567/SSDM.2023.K-1-04

The 3D vertical poly-Si channel FeFET has demonstrated with memory window 1.65 V in this work. The architecture of channel first process benefits for write/read effectively due to individual access for each FeFET to eliminate V_pass by NAND. Furthermore, the crystalline of ferroelectric HfZrO₂ is improved with word-line metal contact directly. The high depolarization field is attributed to thick interfacial layer and leads data retention degradation in this work. Index Terms—Poly-Si, FeFET, memory window

2023 International Conference on Solid State Devices and Materials

[K-1-04] 3D Vertical Poly-Si FeFETs Toward Stackable High-Density Non-volatile Memory Applications