This study clarifies for the first time the physical origin of stability improvement in ReRAM Multi-Level Cell (MLC) programming. The addition of a verification delay enhances the detection of unstable ReRAM devices. A 16kb ReRAM array integrated with 28nm FDSOI CMOS technology was used to achieve an eight-level MLC. Through KMC-based 3D simulations, we demonstrate that the verification delay reduces the presence of highly mobile oxygen vacancies (V_O⁺, V_O²⁺) in the ReRAM conductive filament. Consequently, this technique yields a more stable ReRAM with reduced relaxation, mitigating accuracy drop and weight transfer variability in neural networks.