The Japan Society of Applied Physics

09:30 〜 09:45

[N-3-02] Calculation of pnp GaInSb pnp lateral HBT for Complementary Bipolar Logic Technology

Yasuyuki Miyamoto1, Makoto Honjyo1, Koichi Fukuda2 (1. Tokyo Tech (Japan), 2. AIST (Japan))

https://doi.org/10.7567/SSDM.2023.N-3-02

Power consumption and speed were estimated for a GaInSb pnp lateral HBT for application to complementary bipolar logic circuits. At a supply voltage of 250mV, a current gain of 1900, a power consumption ratio between on and off of over 250, and a delay time of 4 ps are confirmed. However, the characteristics degraded rapidly at voltages greater than 300 mV due to deep saturation.