The Japan Society of Applied Physics

2:00 PM - 2:15 PM

[N-7-02] Trap Analysis of Normally-off Ga 2O 3 MOSFET Enabled by Charge Trapping Layer Using Photon Stimulated Characterization

Minghao He1,2, Mujun Li2, Xiaohui Wang2, Qing Wang2, Hongyu Yu2, Kah-Wee Ang1 (1. National Univ. of Singapore (Singapore), 2. Southern Univ. of Sci. and Tech. (China))

https://doi.org/10.7567/SSDM.2023.N-7-02

This work presents the demonstration of a normally-off Ga2O3 MOSFET utilizing a charge trapping layer (CTL). The gate dielectric is engineered with a stack consisting of a tunneling barrier, CTL, and blocking layer. The resulting Ga2O3 E-mode MOSFET exhibits long-term retention characteristic (-0.3 V for 10-year estimation) and high blocking capability (2,140 V), demonstrating excellent compatibility between the proposed gate dielectric stack and Ga2O3 channel. Furthermore, photon stimulated characterization is conducted to extract the trap profile, with results showing high uniformity yield and interface quality of the proposed technique.