This paper presents a novel machine learning (ML) based compact modeling framework using dynamic neural network (DNN). This framework analyzes the effects of process variation (PV) in gate-all-around (GAA) silicon (Si) nanosheet (NS) transistors. DNN model utilizes a composite dataset from TCAD and SPICE simulations for training and takes advantage of both techniques to develop a fast and accurate compact model (CM). It is further implemented into SPICE and evaluated for accuracy through simulations of some circuits including inverter and logic gates. Results with error < 1% explicate a great potential of proposed model for emerging future devices.