In Vertical NAND (V-NAND) flash memory, new structure was proposed using NC-vTFT(NAND Cell vertical TFT) on Cell Array for the first time. It will be very promising structure to improve RC delay as NAND cell stack increases. In this paper, the process flow was introduced and the optimized conditions was introduced to fabricate using Silvaco Athena process simulation tools. Also, it was confirmed that device characteristics is operated normally through simulation.