The Japan Society of Applied Physics

[PS-7-04] Feasibility Study of PLL-based Analog-to-Digital Converter for Low-Voltage Organic Thin-Film Transistors

Hiroki Urabe1, Kunihiro Oshima1, Takashi Sato1 (1. Univ. of Kyoto (Japan))

https://doi.org/10.7567/SSDM.2023.PS-7-04

Organic thin-film transistors (OTFTs) have shown great potential for sensor circuit applications.
To digitize the sensed values, analog-to-digital converters (ADCs) play a crucial role.
This paper presents a small-footprint ADC designed specifically for OTFTs, utilizing a phase-locked loop (PLL) architecture.
The digital circuitry to design the ADC ensures a stable operation against a device performance variation and a rapid aging of OTFTs.
The performance and characteristics of the proposed ADC are evaluated through circuit simulations.