Investigation of Top-gate MoS<sub>2</sub> FETs by Low-temperature ALD High-κ and Hydrazine Passivated Interface

Min- Kun Huang

doi:https://doi.org/10.7567/SSDM.2023.PS-8-12

[PS-8-12] Investigation of Top-gate MoS₂ FETs by Low-temperature ALD High-κ and Hydrazine Passivated Interface

^○Min- Kun Huang¹, Hsu-Tang Liao², William Cheng-Yu Ma², Yeong-Her Wang¹, Chun-Jung Su^3,4 (1. National Cheng Kung Univ. (Taiwan), 2. National Sun Yat-sen Univ. (Taiwan), 3. National Yang Ming Chiao Tung Univ. (Taiwan), 4. Taiwan Semiconductor Research Inst. (Taiwan))

https://doi.org/10.7567/SSDM.2023.PS-8-12

This work studies the impacts of ALD Al₂O₃ deposition temperature and passivation technique on top-gate (TG) MoS₂ FETs. It is found that 85 ^oC-deposited Al₂O₃did not react with MoS₂, and thus can be used as a good passivation layer and top-gate dielectric. Nevertheless, the interaction of 250 ^oC-formed Al₂O₃ with MoS₂ significantly leads to increased device off current and deteriorated gate leakage current. An ALD in-situ N₂H₄ treatment on the MoS₂ surface is thus proposed and demonstrated to effectively mitigate such harmful effect. The treated TG FET reveals greatly reduced leakage. Therefore, N₂H₄ surface treatment is advantageous to the manufacture of top-gate MoS₂ FET.

2023 International Conference on Solid State Devices and Materials

[PS-8-12] Investigation of Top-gate MoS2 FETs by Low-temperature ALD High-κ and Hydrazine Passivated Interface

[PS-8-12] Investigation of Top-gate MoS₂ FETs by Low-temperature ALD High-κ and Hydrazine Passivated Interface