This study investigates the impact of erase voltage on the variability of ferroelectric field effect transistor (FeFET) devices. Our results indicate that an optimal erase voltage can significantly reduce device-to-device variability in the high threshold voltage (HVT) state for FeFETs. We employed a systematic pulsing methodology and demonstrated that the variability of FeFET devices is closely linked to the dipole switching and trapping behavior, and therefore can be effectively controlled by adjusting the erase voltage. The results highlight the significance of erase voltage in enhancing the performance and reliability of FeFETs.