The Japan Society of Applied Physics

14:16 〜 14:18

[SO-PS-02-24] Positive Feedback Field Effect Transistor Based on Vertical NAND Flash Structure for In-Memory Computing

Junhyeong Lee1, Misun Cha1, Min-Woo Kwon1 (1. Gangneung-Wonju National Univ (Korea))

The distance between memory and CPU has led to a memory wall. To solve it, an In-memory technology that performs both memory and computation has been studied. In this paper, we propose a positive feedback field-effect transistor based on a vertical NAND flash structure that can simultaneously perform memory and computation to implement ideal in-memory computing. By selecting the operation control gate bias, processing operations can be reconfigured into AND or OR operations, memory can be performed by accumulating charges on body, and logic operations can be performed by reading data stored in the charge trap layer.