[17a-Z26-1~9] 13.5 Semiconductor devices/ Interconnect/ Integration technologies

[17a-Z26-5] Energy-efficient operation at energy minimum point for ultralow-voltage-retention SRAM

〇Yusaku Shiotsu¹, Shuu'ichirou Yamamoto¹, Satoshi Sugahara¹ (1.FIRST, Tokyo Inst. of Tech.)

Keywords:power gating, SRAM, low power